Airbnb Entry-Level Embedded Developer Interview Preparation Guide

void ISR(void) {
    uint32_t status = MMIO_READ(STATUS);
    // Acknowledge the bits we observed immediately to avoid races
    MMIO_WRITE(STATUS, status); // clear observed bits (W1C)
    if (status & BIT_A) handle_a();
    if (status & BIT_B) handle_b();
    // Optionally re-read to check for events that arrived during handling
    uint32_t new = MMIO_READ(STATUS);
    if (new) {
        MMIO_WRITE(STATUS, new);
        // handle new bits (or re-trigger ISR)
    }
}

// uart.h
typedef enum { UART_PARITY_NONE, UART_PARITY_EVEN, UART_PARITY_ODD } uart_parity_t;
typedef enum { UART_STOP_1, UART_STOP_2 } uart_stop_t;
typedef enum { UART_OK=0, UART_ERR_OVERRUN, UART_ERR_PARITY, UART_ERR_FRAMING } uart_err_t;
typedef void (*uart_event_cb_t)(int events);

int uart_init(int port, uint32_t baud, uart_parity_t parity, uart_stop_t stop,
              bool use_dma, uart_event_cb_t cb);
int uart_deinit(int port);
int uart_tx_blocking(int port, const uint8_t *data, size_t len, uint32_t timeout_ms);
int uart_tx_nonblocking(int port, const uint8_t *data, size_t len);
int uart_rx_nonblocking(int port, uint8_t *buf, size_t len); // starts async read
uart_err_t uart_get_error(int port);

/* use GNU ld syntax */
MEMORY
{
  FLASH (rx)  : ORIGIN = 0x0000,  LENGTH = 256K    /* example total flash */
  RAM   (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
}

/* Define regions */
_bootloader_start = 0x0000;
_bootloader_len   = 0x8000;
_main_start       = _bootloader_start + _bootloader_len; /* 0x8000 */
_eeprom_start     = ORIGIN(FLASH) + (LENGTH(FLASH) - 0x2000); /* last 8KB */

SECTIONS
{
  /* Main firmware placed starting at _main_start */
  .text :
  {
    . = _main_start;
    *(.isr_vector)    /* vector table */
    *(.text*)
    *(.rodata*)
  } > FLASH

  .rodata : { *(.rodata*) } > FLASH

  _etext = .;

  .data : AT(_etext)
  {
    _sdata = .;
    *(.data*)
    _edata = .;
  } > RAM

  .bss (NOLOAD) :
  {
    _sbss = .;
    *(.bss*)
    *(COMMON)
    _ebss = .;
  } > RAM

  /* EEPROM emulation placed at end of flash */
  .eeprom (NOLOAD) :
  {
    . = _eeprom_start;
    KEEP(*(.eeprom))
  } > FLASH
}

// Example: peripheral_status_read/write are HW accessors
#define STATUS_MASK_ALL  0xFFFFu

void IRQ_Handler(void)
{
    uint32_t status, pending, ack;

    // 1) Mask peripheral interrupt in interrupt controller to prevent races
    NVIC_DisableIRQ(PERIPH_IRQ);

    do {
        status  = PERIPH->STATUS;                 // read W1C status register
        pending = status & STATUS_MASK_ALL;       // consider only enabled bits
        if (pending == 0) break;

        ack = pending;                            // acknowledge exactly observed bits
        PERIPH->STATUS = ack;                     // write-one-to-clear those bits

        // Optionally re-enable IRQ here to allow higher-priority preemption
        NVIC_EnableIRQ(PERIPH_IRQ);

        // 2) Service each source (do NOT touch STATUS here)
        if (pending & BIT_RX) handle_rx();
        if (pending & BIT_TX) handle_tx();
        if (pending & BIT_ERR) handle_error();

        // 3) Re-disable before next loop iteration to avoid race with read/ack
        NVIC_DisableIRQ(PERIPH_IRQ);

        // loop to pick up any events that arrived after the previous read/ack
    } while (1);

    // final unmask
    NVIC_EnableIRQ(PERIPH_IRQ);
}

void USART_IRQHandler(void) {
  while (uart_has_data()) {
    process_message_sync(); // parsing, CRC, flash write
  }
}

void USART_IRQHandler(void) {
  char b = read_uart_byte();
  ringbuf_put(&rx_buf, b);            // O(1), fast
  osSemaphoreGiveFromISR(uart_sem);   // notify worker
}

void uart_task(void *arg) {
  while (1) {
    osSemaphoreWait(uart_sem, WAIT_FOREVER);
    while (ringbuf_get(&rx_buf, &b)) process_message_async(b);
  }
}